Jing (Jane) Li is a Dugald C. Jackson Assistant Professor in the department of Electrical and Computer Engineering and Computer Science (affiliated) the University of Wisconsin – Madison. She is part of Computer Architecture @ UW-Madison and Machine Learning @ UW-Madison. She is one of the PIs in SRC JUMP center – Center for Research on Intelligent Storage and Processing-In-Memory (CRISP). She spent her early career at IBM T. J. Watson Research Center as a Research Staff Member after obtaining her PhD degree from Purdue University in 2009. She is broadly interested in the big problems in computer system across the full stack. She is also a passionate computer experimentalist and enjoy building real computer systems (both hardware and software). In particular, she has made contributions to the following “memory-centric” areas: 1) domain-specific accelerator and its interaction with emerging memories (HMC/HBM/NVM), 2) programmable in-memory computing architecture enabled by emerging nonvolatile memories (PCM/RRAM/STT RAM), 3) system support (e.g., virtualization) for accelerators (e.g., FPGA), and 4) FPGA-based full system simulation infrastructure (MEG) for memory system research. A summary of her research can be found at https://wicil.ece.wisc.edu/research/. A research vision on the importance of interaction between machine learning and computer system can be found at our white paper (co-authored with a number of great researchers in both fields).

One key differentiator of her research is that besides modeling and simulations, she put strong emphasis on real hardware demonstration through architecting, designing and testing new prototypes, both at chip level and system level. The systems that she built with her students have achieved several key milestones, including a scalable graph analytics system ranked No. 1 on the GreenGraph500 list, a deep learning system that set the world-record in performance and energy efficiency for accelerating dense convolutional neural network using FPGA. She and her research team has also taped out several new computer chips with complete system support (programming model, runtime, virtualization, API, etc.) that are built with post-CMOS nonvolatile memory technology (e.g., RRAM) integrated with silicon CMOS through monolithic 3D integration, including Liquid Silicon which won DARPA Young Faculty Award (one out of 2 in computer area and one out of 26 across all areas nationwide, the first awardee in computer engineering and computer science at UW-Madison), and Two-Dimensional Associative Processor which won NSF CAREER Award, in addition to the first fabricated in-memory processing chip for search and a variable-bit storage chip that I built at IBM which won IBM's highest technical achievement award, the IBM's CEO Milestone.

Vivienne Sze is an Associate Professor at MIT in the Electrical Engineering and Computer Science Department. Her research interests include energy-aware signal processing algorithms, and low-power circuit and system design for portable multimedia applications, including computer vision, deep learning, autonomous navigation, and video coding. Prior to joining MIT, she was a Member of Technical Staff in the R&D Center at TI, where she designed low-power algorithms and architectures for video coding. She also represented TI in the JCT-VC committee during the development of High Efficiency Video Coding (HEVC), which received a Primetime Emmy Engineering Award. She is a co-editor of the book entitled “High Efficiency Video Coding (HEVC): Algorithms and Architectures” (Springer, 2014).

Prof. Sze is a recipient or co-recipient of the 2011 Jin-Au Kong Outstanding Doctoral Thesis Prize in Electrical Engineering at MIT, the 2017 CICC Outstanding Invited Paper Award, the 2017 Qualcomm Faculty Award, the 2016 IEEE Micro Top Picks Award, the 2016 Google Faculty Research Award, the 2016 AFOSR Young Investigator Award, the 2016 3M Non-Tenured Faculty Award, the 2014 DARPA Young Faculty Award, the 2008 A-SSCC Outstanding Design Award and the 2007 DAC/ISSCC Student Design Contest Award.

I am a Postdoc researcher at ETH Zurich, working with Prof. Onur Mutlu. My research interests include non-volatile memory, processing in memory, memory security, and machine learning.

I am a PhD student in the School of Electrical and Computer Engineering at Purdue University. I received my Bachelors (2018) in Electronics and Communication Engineering (with honors) from Indian Institute of Technology Roorkee, India. I was a recipient of the IITR Heritage Excellence Award, INSA-NASI-IASc Summer Research Fellowship, and ENCORE Scholarship Award for outstanding performance in academics and curricular during my time at IIT Roorkee. Subsequently, I worked for Texas Instruments for one year on standard cell design and methodologies in collaboration in EDA team. I joined my PhD program in Fall 2019 and since have been a part of Nanoelectronics Research Lab. My research interests include computer architecture, hardware accelerators for Machine Learning applications using emerging technologies, and design of processing in/near memory based architectures. In my free time, I like to play badminton, dance, go for running, or listen to music.