Sarita V. Adve is the Richard T. Cheng Professor of Computer Science at the University of Illinois at Urbana-Champaign. Her primary research interest is at the hardware-software interface with work spanning computer architecture, programming languages, operating systems, and applications. Her current research is on scalable system specialization and approximate computing.

She co-developed the memory consistency models for the C++ and Java programming languages, which are based on her early work on data-race-free (DRF) models. More recently, her work questioned the conventional wisdom for memory models for heterogeneous systems and showed that DRF is a superior model even for such systems. She is also known for her contributions to cache coherence (she co-developed the simple and efficient DeNovo coherence protocol); hardware reliability (she co-developed software-driven approaches for hardware reliability in the SWAT project and the concept of lifetime reliability aware architectures and dynamic reliability management in the RAMP project); power management (she led the design of GRACE, one of the first systems to implement cross-layer energy management); exploiting instruction-level parallelism (ILP) for memory system performance (she co-authored some of the first papers on exploiting ILP for memory level parallelism); and evaluation techniques for shared-memory multiprocessors with ILP processors (she led the development of the RSIM architecture simulator).

Professor Adve was named a Woman of Vision in innovation by the Anita Borg Institute for Women in Technology in 2012, an IEEE fellow in 2012, an ACM fellow in 2010, and received the ACM SIGARCH Maurice Wilkes award in 2008. For three of the last five years (2014-18), Illinois CS has selected her students' PhD theses as one of the department's two nominations for the ACM doctoral dissertation award. She currently serves as the chair of ACM SIGARCH, on the DARPA/ISAT study group, and on the board of directors of the Computing Research Association (CRA).

She received the Ph.D. and M.S. degrees in Computer Science from the University of Wisconsin - Madison in 1993 and 1989 respectively, and the B.Tech. degree in Electrical Engineering from the Indian Institute of Technology - Bombay in 1987.

Dr. Ghazal Tashakor is a scientific staff member affiliated with multiple institutes and universities in Germany and Spain. She obtained her Ph.D. in High-Performance Computing (HPC) and advanced simulation from the Autonomous University of Barcelona in 2019. Her ongoing research endeavors primarily focus on conducting large-scale computer simulations. Additionally, she serves as a core developer in distributed and parallel architecture patterns, ranging from grid computing to data visualization/monitoring, with a specific emphasis on Big Data and advanced hierarchical models. She collaborates with various research centers in Germany, including Fraunhofer and Jülich Supercomputer Centre.

Computer Science Engineer, specializing in Hardware and Network Systems from SUNY Buffalo. Highly passionate about Research in the field of VLSI , Computer Architecture and Hardware Security. Also, I have a great interest in the field of Routers and Switches, MIMO technology and VLSI Digital Circuit designing. Along with my Master's I am also working as a Graduate Assistant in HPVSA Laboratory, in the Dept. of Computer Science Engineering , SUNY Buffalo. My current research is on design and optimization of Physically Unclonable Functions (PUF), which could act as a fingerprint for semiconductor devices.

Furthermore, I have obtained my Bachelor's degree in Electronics and Communication Engineering from SRMIST,Chennai,India. During my undergrad I sincerely worked under my Professor for the research project - on Tunnel Field Effect Transistor, which we presented at the National Conference Silicon'18. Our paper "Design Optimization of Tunnel Field Effect Transistor" was published in International Journal of Recent Technology and Engineering (IJRTE) in March 2019.

The amalgamation of Electronics, Computers and Communications have helped me to pave stronger base for the skills needed in the field of Computer Hardware and Computer Networks.

Mitali is a PhD student at Advanced Multicore Systems (AMS) lab, IIIT Delhi. She holds a gold medal in both Bachelor’s and Master's degrees. Her research interests include heterogeneous systems architectures and hardware security. She also works on designing efficient communication platforms for heterogeneous multi-core systems. She is currently focusing on design space optimization and security analysis of accelerator-rich heterogeneous system-on-chips (ArSoCs). Her recent works on energy-optimization of ArSoCs and SoC security were published in premier journals like TODAES'20 and TETC'21. She has published 1 book chapter and contributed to research works published in conferences including ASAP'18, ISCAS'18, ISVLSI'18, IGSC'18, ISCAS'20. She has experience of almost a year in academia as a lecturer and a research associate.