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Our

Mission

Women in Computer Architecture (WICARCH) is designed to create a community for women studying and working in the field of computer architecture. Our goal is to promote women in computer architecture and increase visibility for their research and development contributions. We welcome participation from all women including students, post docs, industry researchers and developers and faculty members. To be listed in our directory, please click here.

Profiles of WICArch

The mission of this section is to profile women in computer architecture across many walks of our field, from [junior, senior] x [industry, academia].

If you would like to be profiled, would like to nominate someone to be profiled, or would like to write a profile, please let us know by wicarch-chair@acm.org

Mengjia Yan

by Lisa Hsu on February 5, 2020

Dr. Mengjia Yan is undoubtedly one of the most delightful people you will ever meet – smart, positive, exceedingly wise beyond her years, and the kind of person who can turn a frown upside down.  She was paired with me as a mentee at ISCA 2018, but I genuinely think that it is I who have benefited from the relationship.  These days, she is a new assistant professor at MIT, having recently completed her PhD at the University of Illinois at Urbana-Champaign in 2019.

Read more...

WICArch Directory

We actively maintain a list of women working in the field of computer architecture.  The goal of this list is many-fold.  First, the list services as a resource for program chairs and conference organizers to identify women to serve in key technical roles such as keynote, panels and program committees.  Second, the list is designed to foster community and help women connect with other women in computer architecture.  This list can be used by current and potential graduate students to find advisors and mentors. Four profiles, selected randomly, are shown below.  We encourage you to browse the full directory.

Picture of Diksha Moolchandani

Diksha Moolchandani

Ph.D. Research Scholar
Indian Institute of Technology Delhi, New Delhi, India
Personal URL

Research Statement

I am currently a Ph.D. Research Scholar with the School of IT, Indian Institute of Technology Delhi, New Delhi, India.
My current research interests span the areas of architecture design and acceleration techniques for computer vision and image processing applications, designing convolutional neural network accelerators, and machine learning applications to computer architecture.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Iot, Mobile and Embedded Architecture, Multiprocessor Systems
Picture of Dr. Swapnita Srivastava

Dr. Swapnita Srivastava

Assistant Professor
G L Bajaj Institute of Technology and Managenent
Personal URL

Research Statement

Dr. Swapnita Srivastava is a highly accomplished researcher and educator in the field of computer science and engineering. With a Ph.D. in Cache Memory from Madan Mohan Malaviya University of Technology, Gorakhpur, she has made significant contributions to optimizing cache replacement policies using machine learning techniques. Her expertise extends to teaching and she has served as an Assistant Professor at prestigious institutions such as G L Bajaj Institute of Technology and Management and Galgotias University. Her research prowess is evidenced by her extensive publication record, including articles in renowned journals and presentations at international conferences. She is also a patent holder and has actively participated in faculty development programs and workshops. With a strong foundation in technical skills and a passion for research, she continues to make valuable contributions to the field of computer science.

Interests

Architectural Support For Programming Languages Or Software Development, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Hanieh

Hanieh

PhD Candidate
University of Southern California
(No URL)

Research Statement

Interests

Architectural Support For Security Or Virtualization, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Antara

Antara

PhD Scholar
Indian Institute of Technology Bombay
(No URL)

Research Statement

Antara is doing a PhD at Computer Architecture and Dependable Systems Lab (CADSL), IIT Bombay in collaboration with the University of Tokyo. She is an Intel India PhD fellow and Google WomenTechmaker Asia-Pacific scholar. She is currently interning at Microarchitecture Research Labs (MRL), Intel India. Her areas of interest include near-data processing, 3D DRAMs, convolutional neural network, non-von Neumann architecture and related topics. She has worked on multicore cache coherence protocols during her masters at IIIT Delhi. Her work on dual-port SRAMs with ST Microelectronics was published in VDAT’16. She interned at SanDisk where she designed a digital duty cycle corrector for NAND flash high-speed interface. She has also worked in automotive electronics at TATA Motors Sanand plant.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Effects Of Circuits Or Technology On Architecture, Processor, Memory, and Storage Systems Architecture

Full Directory // List Yourself // Update Profile

We regularly organize a social gathering of women at the start of major architecture conferences (ISCA, HPCA, ASPLOS and MICRO).  These meet ups help newcomers to our conferences become better integrated in the community and reduce some of the pressure and intimidation they might feel at their first conference.  They provide great networking opportunities.  We hope to see you at the next one!
Would you like to attend a SIGARCH-sponsored event, but cannot because the cost of child-care is prohibitive? SIGARCH provides funds for a limited number of grants that support child care for members that would like to participate in a SIGARCH-sponsored event but are unable to do so without this support. SIGARCH provides financial assistance to subsidize a variety of child-care options. View details here.
Annually, we provide a brochure of upcoming female graduates in computer architecture. The goal of this brochure is to bring greater visibility to women on the job market and to celebrate their success as PhD students.

2018-2019 Candidates
2019 Candidates

Check out our WICARCH YouTube channel which features recorded technical talks by members of the WICARCH community.

Initiatives

We organize various initiatives to better connect women in computer architecture.

Join Our Mailing List

Our mailing list is maintained through ACM.  You can join in 3 easy steps:

1. Join SIGARCH/SIGMICRO (you don’t need to be a full ACM member — you can join a SIG only which is pretty cheap!)

SIGARCH   |   SIGMICRO

2. Update your gender in your myACM account (create/activate account as needed)

Student members: if you log into myACM, you should see a “My Student Profile” on the left menu.  This is where you can specify gender.
Professional members: if you log into myACM, you should see a “My Professional and Technical Interest Profile” on the left menu you.  This is where you can specify gender.
3. Accept to receive emails from ACM:
In myACM, under “My Contact Information”, “Email Policy”, “Current preference” should have the box “Please send me ACM Announcements via email” checked.

Join Our Slack Channel

We offer an informal mentoring program through our slack channel (wicarch.slack.com).  Women at all career stages are encouraged to join.  The mentoring program provides an easy way to connect with other women and receive advice on a wide range of career and personal issues.

If you need assistance in joining our mailing list or slack channel, please send email to wicarch-chair@acm.org.

This website serves women in the field of computer architecture.
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