WICARCH Logo

Our

Mission

Women in Computer Architecture (WICARCH) is designed to create a community for women studying and working in the field of computer architecture. Our goal is to promote women in computer architecture and increase visibility for their research and development contributions. We welcome participation from all women including students, post docs, industry researchers and developers and faculty members. To be listed in our directory, please click here.

Profiles of WICArch

The mission of this section is to profile women in computer architecture across many walks of our field, from [junior, senior] x [industry, academia].

If you would like to be profiled, would like to nominate someone to be profiled, or would like to write a profile, please let us know by wicarch-chair@acm.org

Mengjia Yan

by Lisa Hsu on February 5, 2020

Dr. Mengjia Yan is undoubtedly one of the most delightful people you will ever meet – smart, positive, exceedingly wise beyond her years, and the kind of person who can turn a frown upside down.  She was paired with me as a mentee at ISCA 2018, but I genuinely think that it is I who have benefited from the relationship.  These days, she is a new assistant professor at MIT, having recently completed her PhD at the University of Illinois at Urbana-Champaign in 2019.

Read more...

WICArch Directory

We actively maintain a list of women working in the field of computer architecture.  The goal of this list is many-fold.  First, the list services as a resource for program chairs and conference organizers to identify women to serve in key technical roles such as keynote, panels and program committees.  Second, the list is designed to foster community and help women connect with other women in computer architecture.  This list can be used by current and potential graduate students to find advisors and mentors. Four profiles, selected randomly, are shown below.  We encourage you to browse the full directory.

Placeholder. No Picture provided by Wenjie Xiong

Wenjie Xiong

PhD Candidate
Yale University
Personal URL

Research Statement

I am broadly interested in hardware security. I am working on designs of new Physically Unclonable Functions (PUFs), leveraging physical properties of hardware for new cryptographic and security applications, and security verification of processor architectures.

Interests

Architectural Support For Security Or Virtualization
Picture of Iyswarya Narayanan

Iyswarya Narayanan

Performance and Capacity Engineer
Facebook
Personal URL

Research Statement

I am an infrastructure engineer at Facebook. I graduated from Penn State with a PhD in 2019. I am interested in optimizing the physical infrastructure of a datacenter viz., power, compute, memory and storage. In my recent works I applied data analytics, system-level profiling and optimizations for efficient datacenter operations.

During PhD, I spent three summers as an intern at Microsoft Research which greatly shaped my research directions. My work on flash reliability titled, SSD failures in datacenters: What? When? Why? was awarded Best Student Paper at SYSTOR-2016. I have also received outstanding graduate research assistant award at Penn State in 2018.

Interests

Datacenter-Scale Computing, Evaluation and Measurement Of Real Systems, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Swati Sajee Kumar

Swati Sajee Kumar

Graduate Student
State University of New York
Personal URL

Research Statement

Computer Science Engineer, specializing in Hardware and Network Systems from SUNY Buffalo. Highly passionate about Research in the field of VLSI , Computer Architecture and Hardware Security. Also, I have a great interest in the field of Routers and Switches, MIMO technology and VLSI Digital Circuit designing. Along with my Master's I am also working as a Graduate Assistant in HPVSA Laboratory, in the Dept. of Computer Science Engineering , SUNY Buffalo. My current research is on design and optimization of Physically Unclonable Functions (PUF), which could act as a fingerprint for semiconductor devices.

Furthermore, I have obtained my Bachelor's degree in Electronics and Communication Engineering from SRMIST,Chennai,India. During my undergrad I sincerely worked under my Professor for the research project - on Tunnel Field Effect Transistor, which we presented at the National Conference Silicon'18. Our paper "Design Optimization of Tunnel Field Effect Transistor" was published in International Journal of Recent Technology and Engineering (IJRTE) in March 2019.

The amalgamation of Electronics, Computers and Communications have helped me to pave stronger base for the skills needed in the field of Computer Hardware and Computer Networks.

 

Interests

Architectural Support For Security Or Virtualization, Effects Of Circuits Or Technology On Architecture, Instruction, Thread and Data-Level Parallelism, Interconnection Network, Router and Network Interface Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Marjan Asadinia

Marjan Asadinia

Assistant Professor
California Polytechnic State University, Humboldt
(No URL)

Research Statement

Interests

Processor, Memory, and Storage Systems Architecture

Full Directory // List Yourself // Update Profile

We regularly organize a social gathering of women at the start of major architecture conferences (ISCA, HPCA, ASPLOS and MICRO).  These meet ups help newcomers to our conferences become better integrated in the community and reduce some of the pressure and intimidation they might feel at their first conference.  They provide great networking opportunities.  We hope to see you at the next one!
Would you like to attend a SIGARCH-sponsored event, but cannot because the cost of child-care is prohibitive? SIGARCH provides funds for a limited number of grants that support child care for members that would like to participate in a SIGARCH-sponsored event but are unable to do so without this support. SIGARCH provides financial assistance to subsidize a variety of child-care options. View details here.
Annually, we provide a brochure of upcoming female graduates in computer architecture. The goal of this brochure is to bring greater visibility to women on the job market and to celebrate their success as PhD students.

2018-2019 Candidates
2019 Candidates

Check out our WICARCH YouTube channel which features recorded technical talks by members of the WICARCH community.

Initiatives

We organize various initiatives to better connect women in computer architecture.

Join Our Mailing List

Our mailing list is maintained through ACM.  You can join in 3 easy steps:

1. Join SIGARCH/SIGMICRO (you don’t need to be a full ACM member — you can join a SIG only which is pretty cheap!)

SIGARCH   |   SIGMICRO

2. Update your gender in your myACM account (create/activate account as needed)

Student members: if you log into myACM, you should see a “My Student Profile” on the left menu.  This is where you can specify gender.
Professional members: if you log into myACM, you should see a “My Professional and Technical Interest Profile” on the left menu you.  This is where you can specify gender.
3. Accept to receive emails from ACM:
In myACM, under “My Contact Information”, “Email Policy”, “Current preference” should have the box “Please send me ACM Announcements via email” checked.

Join Our Slack Channel

We offer an informal mentoring program through our slack channel (wicarch.slack.com).  Women at all career stages are encouraged to join.  The mentoring program provides an easy way to connect with other women and receive advice on a wide range of career and personal issues.

If you need assistance in joining our mailing list or slack channel, please send email to wicarch-chair@acm.org.

This website serves women in the field of computer architecture.
© 2021 SIGARCH.