Atefeh Mehrabi is a PhD student at ECE department of Duke University. She is co-advised by Prof. Sorin and Prof. Lee. Her research focuses in the area of computer architecture. More specifically, she is exploring and trying to tackle challenges of emerging reconfigurable accelerators. She got her B.Sc degree from University of Tehran in 2016 in Electrical Engineering and her M.Sc degree in Computer Engineering from Duke in 2018.

I teach computer architecture and design courses at SJSU's computer engineering department. I have 13 years of academic work experience. My research interests includes processor architectures, memory subsystems, and performance evaluations.
I earned my M.Tech. (2011) and Ph.D. (2022) degrees from Amrita Vishwa Vidyapeetham in Bangalore, India, where I worked on low-power cache architecture and fine-grain data classification in cache coherence mechanisms to improve system performance. My work has appeared in computer architecture conferences (PDP) and the JPDC journal.

Server memory management is an evolving and challenging area. With growing memory capacity installed per machine and increasing memory DIMM costs, data center planners are facing with huge increase in memory TCO. A plausible direction is to categorize memory accesses by required service level objective (SLO) with the end goal to map lower SLO request to cheaper but low quality memory resource, while using expensive, highest quality memory resource for most critical application request. I work in Linux server memory management to categorize memory access transparent to the user space.

My research interests lie in field-programmable technology and electronic design automation, with increasing focus on the hardware security vulnerabilities of today’s heterogeneous and intelligent computing systems.