I am an assistant professor at the department of computer science and Engineering at AUC. Before that, I did my Ph.D. studies as a CYD doctoral fellow at EPFL. I was working with Dr. Mirjana Stojilovic at the Parallel Systems Architecture (PARSA) laboratory led by Professor Babak Falsafi.

My research interests are focused on field programmable gate arrays (FPGAs) security. In particular, I look at the possible remote attacks on FPGAs. Furthermore, I am interested in the security of heterogeneous CPU-FPGA systems. I investigate possible attacks on and across system components. The goal is to find the vulnerabilities and design lightweight and effective countermeasures.

I am grateful to have received the CYD Doctoral Fellowship, the Google Generation Scholarship, and the EPFL EDIC Fellowship.

I'm a PhD student researching microarchitectural security and side-channel attacks in the CoreSec group at the IAIK, Graz University of Technology. Developing microarchitectural attacks and countermeasures has exposed me to many subfields of computer architecture. I'm particularly interested in ISA design and instruction decoding, the 'conflict' between energy efficiency and security, and whether we can rearchitect the CPU and the memory subsystem to reduce this conflict.

Natalie Enright Jerger is the Canada Research Chair in Computer Architecture and a Professor of Electrical and Computer Engineering at the University of Toronto. She is currently serving as the Director of the Division of Engineering Scinece at the University of Toronto. Prior to joining the University of Toronto, she received her MSEE and PhD from the University of Wisconsin-Madison in 2004 and 2008, respectively. She received her Bachelor's degree from Purdue University in 2002. She is a recipient of the Ontario Ministry of Research and Innovation Early Researcher Award in 2012, the 2014 Ontario Professional Engineers Young Engineer Medal recipient and the 2015 Borg Early Career Award winner. She served as the program co-chair of the 7th Network-on-Chip Symposium, as the program chair of the 20th International Symposium on High Performance Computer Architecture and as program co-chair for the International Conference on Architectural Support for Programming Languages and Operating Systems in 2023. She is currently serving as the ACM SIGARCH Chair. Her current research explores on-chip networks, approximate computing, IoT architectures and machine learning acceleration. She is also passionate about increasing the representation of women in computing, particular in computer architecture. She is the former chair of the organizing committee for the Women in Computer Architecture group (WICARCH). In 2017, she co-authored the second edition of the Computer Architecture Synthesis Lecture on On-Chip Networks with Li-Shiuan Peh and Tushar Krishna. Her research has been supported by NSERC, Intel, CFI, AMD and Qualcomm.

I teach computer architecture and design courses at SJSU's computer engineering department. I have 13 years of academic work experience. My research interests includes processor architectures, memory subsystems, and performance evaluations.
I earned my M.Tech. (2011) and Ph.D. (2022) degrees from Amrita Vishwa Vidyapeetham in Bangalore, India, where I worked on low-power cache architecture and fine-grain data classification in cache coherence mechanisms to improve system performance. My work has appeared in computer architecture conferences (PDP) and the JPDC journal.