Computer Science Engineer, specializing in Hardware and Network Systems from SUNY Buffalo. Highly passionate about Research in the field of VLSI , Computer Architecture and Hardware Security. Also, I have a great interest in the field of Routers and Switches, MIMO technology and VLSI Digital Circuit designing. Along with my Master's I am also working as a Graduate Assistant in HPVSA Laboratory, in the Dept. of Computer Science Engineering , SUNY Buffalo. My current research is on design and optimization of Physically Unclonable Functions (PUF), which could act as a fingerprint for semiconductor devices.

Furthermore, I have obtained my Bachelor's degree in Electronics and Communication Engineering from SRMIST,Chennai,India. During my undergrad I sincerely worked under my Professor for the research project - on Tunnel Field Effect Transistor, which we presented at the National Conference Silicon'18. Our paper "Design Optimization of Tunnel Field Effect Transistor" was published in International Journal of Recent Technology and Engineering (IJRTE) in March 2019.

The amalgamation of Electronics, Computers and Communications have helped me to pave stronger base for the skills needed in the field of Computer Hardware and Computer Networks.

Angeles G. Navarro received her PhD in Computer Science from the University of Malaga (Spain) in 2000. She is a Professor in the Department of Computer Architecture at the University of Malaga. She has been a Research Visiting Scholar in the University of Illinois at Urbana-Champaign, the Technical University of Munich, the EPCC at the University of Edinburgh, the University of Bristol, and a Research Visitor in IBM T.J. Watson Research Center at New York and in Cray Inc at Seattle. She is the author or co-author of more than 80 papers and has served as a program committee member for several High Performance Computing related conferences. Her research interests are in parallel programming models and compilation techniques for heterogeneous and reconfigurable architectures.

Dr. Navarro has been involved in many initiatives to promote women in Computer Science. She is the co-founder of WSARTECO (Women in SARTECO), a community that is part of the Spanish Computer Architecture Scientific Society, which encourages junior and senior women working in the area to increase visibility and to develop a supporting network.

Research interests include energy-efficient computing, hardware-software co-design, near memory processing, non-volatile memory.

My research focuses on Computer Architectures and Electronic Design Automation, with emphasis on power-aware design for embedded systems, design space exploration of energy-efficient computer architectures and application autotuning for manycore architectures and High-Performance Computing. In 2017, I have been elevated to the grade of IEEE Fellow “for contributions to energy-efficient computer architectures”. Recently I was European Project Coordinator of the H2020-FET-HPC project ANTAREX-671623 (2015-2018) on "Autotuning and adaptivity approach for energy efficient exascale HPC systems”. I was Project Coordinator of two other European projects: FP7-2PARMA-248716 (2010-2013) and FP7-MULTICUBE-216693 (2008-2010). I am an active member of the scientific community and I regularly serve in several international program committees. I annually teach basic and advanced courses on computer architectures and operating systems.