Antara is doing a PhD at Computer Architecture and Dependable Systems Lab (CADSL), IIT Bombay in collaboration with the University of Tokyo. She is an Intel India PhD fellow and Google WomenTechmaker Asia-Pacific scholar. She is currently interning at Microarchitecture Research Labs (MRL), Intel India. Her areas of interest include near-data processing, 3D DRAMs, convolutional neural network, non-von Neumann architecture and related topics. She has worked on multicore cache coherence protocols during her masters at IIIT Delhi. Her work on dual-port SRAMs with ST Microelectronics was published in VDAT’16. She interned at SanDisk where she designed a digital duty cycle corrector for NAND flash high-speed interface. She has also worked in automotive electronics at TATA Motors Sanand plant.

My research interests are centered around Computer Systems. I am currently focusing on storage and persistent memory technologies, with an emphasis on their impact on the way we manage large-scale data for emerging workloads in Data Science and the Internet of Things.

I completed my PhD in Computer Science at EPFL/the University of Sydney in 2020, advised by Prof. Willy Zwaenepoel. My dissertation research was on the design and implementation of efficient key-value stores for future hardware and performance requirements.

I'm broadly interested in computer architecture, particularly memory systems and the management and synchronization of data. I like building whole, balanced systems and understanding how all the pieces are connected, related, and affect each other.

Evey Liu recently finished her undergraduate study at the University of Waterloo for Computer Engineering. She will begin graduate school at the University of Toronto with supervisor Natalie Enright Jerger in January 2019. She is passionate about generic computer architecture and is open to explore different specializations within the field.