Our

Mission

Women in Computer Architecture (WICARCH) is designed to create a community for women studying and working in the field of computer architecture. Our goal is to promote women in computer architecture and increase visibility for their research and development contributions. We welcome participation from all women including students, post docs, industry researchers and developers and faculty members. To be listed in our directory, please click here.

Profiles of WICArch

The mission of this section is to profile women in computer architecture across many walks of our field, from [junior, senior] x [industry, academia].

If you would like to be profiled, would like to nominate someone to be profiled, or would like to write a profile, please let us know by wicarch-chair@acm.org

Mengjia Yan

Dr. Mengjia Yan is undoubtedly one of the most delightful people you will ever meet – smart, positive, exceedingly wise beyond her years, and the kind of person who can turn a frown upside down.  She was paired with me as a mentee at ISCA 2018, but I genuinely think that it is I who have benefited from the relationship.  These days, she is a new assistant professor at MIT, having recently completed her PhD at the University of Illinois at Urbana-Champaign in 2019.

Read more...

WICArch Directory

We actively maintain a list of women working in the field of computer architecture.  The goal of this list is many-fold.  First, the list services as a resource for program chairs and conference organizers to identify women to serve in key technical roles such as keynote, panels and program committees.  Second, the list is designed to foster community and help women connect with other women in computer architecture.  This list can be used by current and potential graduate students to find advisors and mentors. Four profiles, selected randomly, are shown below.  We encourage you to browse the full directory.

Picture of Narges Shahidi

Narges Shahidi

Software Engineer
Google
Personal URL

Research Statement

I recently graduated from Penn State University. My research at Penn State was focused on memory and storage architecture. I worked on NAND flash solid state drives on cloud and enterprise environments. I also did an internship at Memory Solution Lab in Samsung Semiconductor where I worked on open channel solutions for SSD storage architectures. I am now a Software Engineer at Google platform team working on system drivers for cloud storages.

Interests

Processor, Memory, and Storage Systems Architecture
Picture of Jing (Jane) Li

Jing (Jane) Li

Dugald C. Jackson Assistant Professor
University of Wisconsin Madison
Personal URL

Research Statement

Jing (Jane) Li is a Dugald C. Jackson Assistant Professor in the department of Electrical and Computer Engineering and Computer Science (affiliated) the University of Wisconsin – Madison. She is part of Computer Architecture @ UW-Madison and Machine Learning @ UW-Madison. She is one of the PIs in SRC JUMP center – Center for Research on Intelligent Storage and Processing-In-Memory (CRISP). She spent her early career at IBM T. J. Watson Research Center as a Research Staff Member after obtaining her PhD degree from Purdue University in 2009. She is broadly interested in the big problems in computer system across the full stack. She is also a passionate computer experimentalist and enjoy building real computer systems (both hardware and software). In particular, she has made contributions to the following “memory-centric” areas: 1) domain-specific accelerator and its interaction with emerging memories (HMC/HBM/NVM), 2) programmable in-memory computing architecture enabled by emerging nonvolatile memories (PCM/RRAM/STT RAM), 3) system support (e.g., virtualization) for accelerators (e.g., FPGA), and 4) FPGA-based full system simulation infrastructure (MEG) for memory system research. A summary of her research can be found at https://wicil.ece.wisc.edu/research/. A research vision on the importance of interaction between machine learning and computer system can be found at our white paper (co-authored with a number of great researchers in both fields).

One key differentiator of her research is that besides modeling and simulations, she put strong emphasis on real hardware demonstration through architecting, designing and testing new prototypes, both at chip level and system level. The systems that she built with her students have achieved several key milestones, including a scalable graph analytics system ranked No. 1 on the GreenGraph500 list, a deep learning system that set the world-record in performance and energy efficiency for accelerating dense convolutional neural network using FPGA. She and her research team has also taped out several new computer chips with complete system support (programming model, runtime, virtualization, API, etc.) that are built with post-CMOS nonvolatile memory technology (e.g., RRAM) integrated with silicon CMOS through monolithic 3D integration, including Liquid Silicon which won DARPA Young Faculty Award (one out of 2 in computer area and one out of 26 across all areas nationwide, the first awardee in computer engineering and computer science at UW-Madison), and Two-Dimensional Associative Processor which won NSF CAREER Award, in addition to the first fabricated in-memory processing chip for search and a variable-bit storage chip that I built at IBM which won IBM's highest technical achievement award, the IBM's CEO Milestone.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architectural Support For Programming Languages Or Software Development, Architectural Support For Security Or Virtualization, Architecture For Emerging Technologies and Applications, Datacenter-Scale Computing, Effects Of Circuits Or Technology On Architecture, Evaluation and Measurement Of Real Systems, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Cristina Silvano

Cristina Silvano

Professor
Politecnico di Milano
Personal URL

Research Statement

My research focuses on Computer Architectures and Electronic Design Automation, with emphasis on power-aware design for embedded systems, design space exploration of energy-efficient computer architectures and application autotuning for manycore architectures and High-Performance Computing. In 2017, I have been elevated to the grade of IEEE Fellow “for contributions to energy-efficient computer architectures”. Recently I was European Project Coordinator of the H2020-FET-HPC project ANTAREX-671623 (2015-2018) on "Autotuning and adaptivity approach for energy efficient exascale HPC systems”. I was Project Coordinator of two other European projects: FP7-2PARMA-248716 (2010-2013) and FP7-MULTICUBE-216693 (2008-2010). I am an active member of the scientific community and I regularly serve in several international program committees. I annually teach basic and advanced courses on computer architectures and operating systems.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Multiprocessor Systems
Picture of Monitha Davuluri

Monitha Davuluri

Graduate Student
California State University, Northridge
(No URL)

Research Statement

Interests

Architectural Support For Programming Languages Or Software Development, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
We regularly organize a social gathering of women at the start of major architecture conferences (ISCA, HPCA, ASPLOS and MICRO).  These meet ups help newcomers to our conferences become better integrated in the community and reduce some of the pressure and intimidation they might feel at their first conference.  They provide great networking opportunities.  We hope to see you at the next one!
Would you like to attend a SIGARCH-sponsored event, but cannot because the cost of child-care is prohibitive? SIGARCH provides funds for a limited number of grants that support child care for members that would like to participate in a SIGARCH-sponsored event but are unable to do so without this support. SIGARCH provides financial assistance to subsidize a variety of child-care options. View details here.
Annually, we provide a brochure of upcoming female graduates in computer architecture. The goal of this brochure is to bring greater visibility to women on the job market and to celebrate their success as PhD students.

2018-2019 Candidates
2019 Candidates

Check out our WICARCH YouTube channel which features recorded technical talks by members of the WICARCH community.

Initiatives

We organize various initiatives to better connect women in computer architecture.

Join Our Mailing List

Our mailing list is maintained through ACM.  You can join in 3 easy steps:

1. Join SIGARCH/SIGMICRO (you don’t need to be a full ACM member — you can join a SIG only which is pretty cheap!)

SIGARCH   |   SIGMICRO

2. Update your gender in your myACM account (create/activate account as needed)

Student members: if you log into myACM, you should see a “My Student Profile” on the left menu.  This is where you can specify gender.
Professional members: if you log into myACM, you should see a “My Professional and Technical Interest Profile” on the left menu you.  This is where you can specify gender.
3. Accept to receive emails from ACM:
In myACM, under “My Contact Information”, “Email Policy”, “Current preference” should have the box “Please send me ACM Announcements via email” checked.

Join Our Slack Channel

We offer an informal mentoring program through our slack channel (wicarch.slack.com).  Women at all career stages are encouraged to join.  The mentoring program provides an easy way to connect with other women and receive advice on a wide range of career and personal issues.

If you need assistance in joining our mailing list or slack channel, please send email to wicarch-chair@acm.org.

This website serves women in the field of computer architecture.
© 2021 SIGARCH.