I'm a PhD student at Chalmers University of Technology in Gothenburg, Sweden. My current research focuses on scalable cache partitioning.

Hi, I am Nayana, a final year Ph.D. candidate at Princeton University, advised by Prof. David August. My research interests are in the field of computer architecture and hardware/software co-design, with more focus on performance improvement at the Datacenter scale. I interned for two consecutive summers with Google Wide Profiling team at Google. Before joining Princeton, I was working as a Verification Engineer at AMD, Bangalore, India.

Amila received her Bachelor's and Master's Degrees from the University of Sarajevo in Electrical Engineering within Computer Science and Informatics Department in 2006, 2009, respectively. In academic year 2007/2008 she received Fulbright Visiting Student Award and joined Embedded Systems and Architectures Lab at University California, Riverside as Junior Researcher. In 2010, she spent 1 month at Faculty of Electrical Engineering, University of Ljubljana as a visiting academic. Then, she received MEXT scholarship in 2010 and spend 3 and half years in beautiful Tokyo, where she completed her Ph.D. at Keio University in 2013.

Her primary area of interest is Computer Architecture, including Reconfigurable Architectures, High Performance Computing and Heterogeneous Computing. Her past research mainly focused on finding new ways to accelerate compute-intensive parts of an algorithm by means of offloading it to an FPGA. The challenge is to take advantage of knowledge about an architecture and adapt the algorithm to the architecture rather than the other way around. Her PhD research focused on developing architectures and methodologies that help to reduce the execution time of Cyclic Redundancy Check algorithms, particularly those implemented using FPGAs, and iSCSI protocol implementation.

In recent years, she has expanded her research to include Digital Signal Processing, Computer Vision, Image Segmentation, Machine Learning to name a few.

Computer Science Engineer, specializing in Hardware and Network Systems from SUNY Buffalo. Highly passionate about Research in the field of VLSI , Computer Architecture and Hardware Security. Also, I have a great interest in the field of Routers and Switches, MIMO technology and VLSI Digital Circuit designing. Along with my Master's I am also working as a Graduate Assistant in HPVSA Laboratory, in the Dept. of Computer Science Engineering , SUNY Buffalo. My current research is on design and optimization of Physically Unclonable Functions (PUF), which could act as a fingerprint for semiconductor devices.

Furthermore, I have obtained my Bachelor's degree in Electronics and Communication Engineering from SRMIST,Chennai,India. During my undergrad I sincerely worked under my Professor for the research project - on Tunnel Field Effect Transistor, which we presented at the National Conference Silicon'18. Our paper "Design Optimization of Tunnel Field Effect Transistor" was published in International Journal of Recent Technology and Engineering (IJRTE) in March 2019.

The amalgamation of Electronics, Computers and Communications have helped me to pave stronger base for the skills needed in the field of Computer Hardware and Computer Networks.