Dr. Guo is an assistant professor in the Department of Electrical and Computer Engineering at Lehigh University. Dr. Guo received her Ph.D. degree in Electrical and Computer Engineering from the University of Rochester in 2015, and B.S. degree from Beihang University in 2009. Dr. Guo's research interests are in the broad area of computer architecture, with an emphasis on leveraging emerging technologies to build energy-efficient architectures. She received the IBM Ph.D. Fellowship twice. Dr. Guo is a recipient of the National Science Foundation CAREER Award and the Lawrence Berkeley National Laboratory Computing Sciences Research Pathways Fellowship.

I am passionate about research and teaching. I want to gain expertise in the field of multi-core architecture and improve coherency and synchronization methods which are crucial for performance in the cutting edge computing applications. I recently gradauted and my research proposed multi-word atomics and its implementation in hardware to assist lock-free programs that are otherwise extremely difficult to program. I am currently working as a CPU architect at Google's CPU team. Additionally, I strongly believe that diversity is instrumental in finding innovative solutions and am committed to making computing a more inclusive world.

Amila received her Bachelor's and Master's Degrees from the University of Sarajevo in Electrical Engineering within Computer Science and Informatics Department in 2006, 2009, respectively. In academic year 2007/2008 she received Fulbright Visiting Student Award and joined Embedded Systems and Architectures Lab at University California, Riverside as Junior Researcher. In 2010, she spent 1 month at Faculty of Electrical Engineering, University of Ljubljana as a visiting academic. Then, she received MEXT scholarship in 2010 and spend 3 and half years in beautiful Tokyo, where she completed her Ph.D. at Keio University in 2013.

Her primary area of interest is Computer Architecture, including Reconfigurable Architectures, High Performance Computing and Heterogeneous Computing. Her past research mainly focused on finding new ways to accelerate compute-intensive parts of an algorithm by means of offloading it to an FPGA. The challenge is to take advantage of knowledge about an architecture and adapt the algorithm to the architecture rather than the other way around. Her PhD research focused on developing architectures and methodologies that help to reduce the execution time of Cyclic Redundancy Check algorithms, particularly those implemented using FPGAs, and iSCSI protocol implementation.

In recent years, she has expanded her research to include Digital Signal Processing, Computer Vision, Image Segmentation, Machine Learning to name a few.

I am currently a senior systems engineer at Qualcomm working on mobile SoC performance analysis.

I received my PhD in 2020 from the ECE department of University of California, Santa Barbara under the guidance of Prof. Yuan Xie, and my Master's degree in 2015. I completed my undergraduate studies in the ECE department of University of Illinois at Urbana-Champaign in 2014. My PhD research explores the design space of the memory fabric in memory-centric system architectures, given the emerging memory technologies and integration trends, to identify bottlenecks and trade-offs and proposes scalable solutions.