Workshop on Memory Architectures and Systems with Emerging Technologies

International Workshop on Memory Architectures and Systems with Emerging Technologies (IWMASET 2018)
June 12, 2018
Beijing, China

IMPORTANT DATES:
Deadline for paper submissions: April 10, 2018
Notification of paper acceptance: April 30, 2018
Deadline of camera-ready version: May 15, 2016
Deadline for author registration: June 10, 2018

The memory system has become increasingly important for today’s high performance computing (HPC) systems. Recent HPC and big data applications require larger capacity and bandwidth, lower latency and energy consumption of the memory system. However, the current DRAM technology is facing technology scaling challenges in terms of memory density and energy efficiency. In large-scale computer systems such as warehouse-scale computers, memory has become the largest portion of total cost of ownership (TCO). Today, the emergence of new non-volatile memory technologies (NVM), such as Phase-Change RAM (PCRAM), Magneto resistive RAM (MRAM) and Resistive RAM (RRAM), have drawn significant attentions in the design of memory systems because they promise persistency, byte-addressability, high density and DRAM-like performance. NVM is expected to be a substitute to DRAM in the future. On the other hand, 3D-stacked DRAM such as High Bandwidth Memory (HBM) achieves high bandwidth and power-efficiency in a substantially smaller form factor than traditional DDR technologies. Those new memory technologies tend to significantly change the landscape of memory systems.

This workshop will provide a high-quality forum for scientists and researchers to showcase their interesting ideas and latest research findings in this rapidly changing field. We will discuss the next generation of memory architectures and systems using new emerging technologies. Authors are invited to submit papers on all aspects of emerging memory technology based computing. Topics of interest include, but are not limited to:
– Hybrid memory architectures and systems.
– Emerging memory technology based cache, and memory architecture.
– Impact of emerging memory technology on computer architecture.
– Impact of emerging memory technology on system software.
– New programming models for emerging memory technologies.
– Emerging memory technology based energy saving technologies.
– Emerging memory technology based reconfigurable architectures.
– Emerging memory technology-inspired hardware/software co-design.
– In-memory computing architecture.
– Applications on emerging memory architectures.
– Big data and databases on emerging memory architectures.
– Benchmarks and experience studies.
– Large-scale deployment of emerging memory systems.

SUBMISSION GUIDELINES:
The submission site is at HotCRP. Please use the Springer template. Each submission must not exceed 8 pages in the Springer 8.5″ x 11″ single-column format with 10 point font, including tables, figures and references. Accepted papers will be included in the SpringerLink (EI index). Selected best paper will be recommended to SCI Journals.
Submission site (With HotCRP): https://iwmaset18.hotcrp.com/

ORGANIZERS:
General Chair:
Xiaofei Liao, Huazhong University of Science and Technology (xfliao@hust.edu.cn)

Program co-chairs:
Bingsheng He, National University of Singapore (hebs@comp.nus.edu.sg)
Haikun Liu, Huazhong University of Science and Technology (hkliu@hust.edu.cn)