Tutorial on Hardware Accelerators for Deep Neural Networks

Tutorial on Hardware Accelerators for Deep Neural Networks
in conjunction with ISCA 2019
Phoenix, Arizona, USA
June 22, 2019

Deep neural networks (DNNs) are currently widely used for many AI applications including computer vision, speech recognition, robotics, etc. While DNNs deliver state-of-the-art accuracy on many AI tasks, it comes at the cost of high computational complexity. Accordingly, designing efficient hardware architectures for deep neural networks is an important step towards enabling the wide deployment of DNNs in AI systems.

This tutorial provides a brief recap on the basics of deep neural networks and is for those who are interested in understanding how those models are mapping to hardware architectures. We will provide frameworks for understanding the design space for deep neural network accelerators including managing data movement, handling sparsity, and importance of flexibility.

NOTE: This is an intermediate-level tutorial that will go beyond the material in the previous incarnations of this tutorial.