1st GPU Warp/Wavefront Scheduling Championship

Submitted by Adwait Jog
http://adwaitjog.github.io/gpu_scheduling.html

1st GPU Warp/Wavefront Scheduling Championship (GPU-WSC)
in conjunction with MICRO 2015
Waikiki, Hawaii
December 5 or 6, 2015
The workshop on computer architecture competitions is a forum for holding
contests to evaluate computer architecture research topics. This workshop
is organized around a competition for scheduling algorithms for Graphics
Processing Units (GPUs). This 1st GPU Warp/Wavefront Scheduling Championship
(GPU-WSC) invites contestants to submit their GPU scheduler design to
participate in this competition. The contestants must develop algorithms to
optimize multiple metrics (e.g., IPC, cache miss-rates, memory bandwidth
utilization, hardware overheads etc.) on a common evaluation framework
provided by the organizing committee.

IMPORTANT DATES:
Phase-1 Submission: Oct 5, 2015
Notification of Acceptance for Phase 1: Nov 2, 2015
Phase-2 Submission: Nov 16, 2015.
Championship Dates: Dec 5 or Dec 6, 2015

CHAMPIONSHIP PROCESS:
There are two following phases in the entire championship process:

Phase 1
1) Write-up Submission:
Interested participants are invited to submit a write-up describing
their GPU Warp scheduler design. This write-up must clearly
demonstrate the idea, motivation, design trade-offs, and estimate the
hardware overheads of their proposed scheduler. In addition, write-up
should provide details on the evaluation methodology and impact of
their proposed scheduler on four metrics: 1) IPC, 2) L1 miss-rates
(all three caches: data, texture, constant), 3) L2 miss-rates, and 4)
DRAM bandwidth utilization, in comparison to the Greedy-then-Oldest
(GTO) GPU Warp Scheduler. The comparison results should be described
in the paper with the help of clearly visible graphs. Please use
GPGPU-Sim (Version 3.2.2). — open-source GPU evaluation platform.
More details are on the championship website.

Note that, the primary metric to rank schedulers is performance (IPC).
In case performance of two schedulers are fairly close, we will use
secondary metrics such as miss-rates, bandwidth utilization, and
hardware overheads for breaking the ties.

The Program Committee chaired by the organizers will review the
submitted write-ups. The submission will be evaluated based on the
novelty, presentation of the results, and effectiveness of the
proposed scheduler on different metrics. Novelty is not a strict
requirement, for example, a contestant may submit his/her previously
published design or make incremental enhancements to a previously
proposed design.

2) File Submission:
The authors are required to submit source code, configuration files,
output result files (dump the simulator output to a file), and a diff
of your code with the unmodified GPGPU-Sim version 3.2.2.

Phase 2
The authors of the accepted write-ups will be required to submit their
final write-ups along with the updated files. In this phase, authors
have an option to incrementally revise their scheduler design to
become more competitive. We expect these changes to be only related to
some optimizations with regard to their scheduler design. A complete
change in the scheduler design is not acceptable.

EVALUATION AND INCENTIVES:
1) Evaluation of Schedulers
The submitted files will be tested by the organizers on the
applications recommended by us (see Simulation Infrastructure section
below). The organizers also plan to include some applications in the
testing set that may not be known apriori to the contestants. The
final ranking of the schedulers will be based on performance (IPC). In
case performance of two schedulers are fairly close, we will use
secondary metrics such as miss-rates, bandwidth utilization, and
hardware overheads for breaking the ties.

2) Incentives
The winner(s) will receive a trophy commemorating his/her triumph (OR
some other prize to be determined later). Authors of all the accepted
write-ups will also be invited to present their papers at the
workshop. All source code, final write-ups, and ranking results will
be made publicly available through this website.

SIMULATION INFRASTRUCTURE:
Please use GPGPU-Sim (Version 3.2.2). — open-source GPU evaluation
platform. More details are on the championship website.

SUBMISSION GUIDELINES:
Phase-1 Submission: Please use the standard LaTeX or Word ACM
templates. Write-up length should not exceed 6 pages. Email your
write-up to all the organizers by the Phase-1 deadline. Also,
submission of files is mandatory.

Phase-2 Submission: Please use the standard LaTeX or Word ACM
templates. Final Write-up length should not exceed 8 pages. Email your
final write-up to all the organizers by the Phase-2 deadline.

ORGANIZING COMMITTEE:
Workshop chairs:
Adwait Jog, College of William and Mary (Email: adwait@cs.wm.edu)
Onur Kayiran, AMD Research (Email: onur@cse.psu.edu)
Tim Rogers, Purdue (Email: timrogers@gmail.com)

Program Committee:
TBD

Steering Committee:
Alaa R. Alameldeen (Intel)
Hyesoon Kim (Georgia Tech)
Moin Qureshi (Georgia Tech)

Questions?
Please contact the organizers with regard to any questions regarding
the championship.