HiPEAC 2016
June 1, 2015
Submitted by Daniel A. Jiménez
http://www.hipeac.net/conference
11th International Conference on High-Performance Embedded
Architectures and Compilers (HiPEAC 2016)
Prague, Czech Republic
January 18-20, 2016
SUBMISSION DEADLINE: June 1, 2015 (Submissions are accepted after
this deadline through the TACO review process)
Sponsored by HiPEAC Compilation & Architecture Seventh Framework
Programme.
The HiPEAC conference is the premier European forum for experts in computer
architecture, programming models, compilers and operating systems for
embedded and general-purpose systems. Associated workshops, tutorials,
special sessions, several large poster session and an industrial exhibition will
run in parallel with the conference. The three day event attracts over 500
delegates each year.
Paper selection is done by ACM TACO, the ACM Transactions on Architecture
And Code Optimization. Prospective authors submit their original papers to
ACM TACO at any time before the paper deadline of June 1, 2015 to benefit
from two rounds of reviews before the conference paper track cut-off date
which is November 15, 2015. Details of the new publication model called
ACM TACO 2.0 are available on the conference web site: model:
https://www.hipeac.org/2016/prague/call-for-papers/
Topics of interest include, but are not limited to:
– Processor, memory, and storage systems architecture
– Parallel, multi-core and heterogeneous systems
– Interconnection networks
– Architectural support for programming productivity
– Power, performance and implementation efficient designs
– Reliability and real-time support in processors, compilers and run-time
systems
– Application-specific processors, accelerators and reconfigurable processors
– Architecture and programming environments for GPU-based computing
– Simulation and methodology
– Architectural and run-time support for programming languages
– Programming models, frameworks and environments for exploiting parallelism
– Compiler techniques
– Feedback-directed optimization
– Program characterization and analysis techniques
– Dynamic compilation, adaptive execution, and continuous profiling/optimization
– Binary translation/optimization
– Code size/memory footprint optimizations
ORGANIZERS:
General Chair:
– Martin Palkovič, IT4Innovations, VŠB-Technical University of Ostrava
Program Chair:
– David Kaeli, Northeastern University
Workshops & Tutorials Chairs:
– Diana Göhringer, Ruhr-Universität Bochum
– Pedro Trancoso, University of Cyprus
Publicity Chairs:
– Daniel A. Jiménez, Texas A&M University
– Dimitrios Soudris, National Technical University of Athens
– Tom Vander Aa, Intel ExaScience Lab, Imec
– Bernhard Egger, Seoul National University
Exhibition Chair:
– Branislav Jansík, IT4Innovations, VŠB-Technical University of Ostrava
Poster Chair:
– Koen De Bosschere, Ghent University
Sponsor Chair:
– Albert Cohen, INRIA
– Bart Kienhuis, Leiden University
Industrial Session Chair:
– Daniel Gracia Pérez, Thales
Finance Chair:
– Vicky Wandels, Ghent University
Web and Registration Chair:
– Eneko Illarramendi, Ghent University
Local Arrangements Committee:
– Martin Palkovič, IT4Innovations, VŠB-Technical University of Ostrava
– Vít Vondrák, IT4Innovations, VŠB-Technical University of Ostrava
– Karina Pešatová, IT4Innovations, VŠB-Technical University of Ostrava