ISFPGA 2025

33rd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Feb 27 – Mar 1, 2025
https://isfpga.org

The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays is a premier conference for presentation of advances in FPGA technology. In 2025, the 33rd edition of FPGA will be held in Monterey, California, USA. Accepted papers will be published in the conference proceedings and available in the ACM Digital Library. At least one of the authors of each accepted submission is required to present the work. Accommodations will be made for the authors who face travel restrictions or unforeseen difficulties with travel.

Paper Submissions (with and without Artifacts)
We solicit research papers related to the following areas:

• FPGA Architecture: Architectures for programmable logic fabrics or their components, including routing, flexible logic cells, embedded blocks (memory, DSP, processors), and I/O interfaces. Novel commercial architectures and architectural features.
• FPGA Circuit Design: Circuits and layout techniques for the design of FPGAs. Impact of future process and design technologies on FPGAs as well as novel memory or nano-scale devices. Methods for analyzing and improving static and dynamic power consumption, power and clock distribution, yield, manufacturability, security, reliability, and testability.
• CAD for FPGAs: Algorithms for synthesis, technology mapping, logic and timing optimization, clustering, placement, and routing of FPGAs. Novel design software for system-level partitioning, debug, and verification. Algorithms for modeling, analysis and optimization of timing and power.
• High-Level Abstractions and Tools for FPGAs: General-purpose and domain-specific languages, tools, and techniques to facilitate the design, debugging and verification of FPGA-based applications and systems. Novel hardware/software co-design and high-level synthesis methodologies enabling digital signal processing, compute acceleration, networking, machine learning, and embedded systems.
• FPGA-based and FPGA-like Computing Engines: Systems and software for compiled accelerators, reconfigurable/adaptive computing, and rapid-prototyping. Programmable overlay architectures implemented using FPGAs.
• Applications and Design Studies: Implementation of novel designs on FPGAs establishing state-of-the-art in high-performance, low-power, security, or high-reliability. Designs leveraging unique capabilities of FPGA architectures or demonstrating significant improvements over alternative programmable technologies (e.g., CPU, GPU). Design studies or architecture explorations enabling improvement of FPGA architectures.
• AI/ML for and on FPGAs: Architectures and implementations of FPGA-based processors for AI/ML algorithms, such as Small Language Models and Large Language Models. Novel uses of AI models to aid in the design and programming of FPGAs. 

Research submissions can be in either of two categories:

• Regular —  at most 10 pages (excluding references), for a regular presentation at the conference.

• Short — at most 6 pages (excluding references), for a brief presentation.

A paper submitted as either regular or short will only be considered in that category and may include artifacts if desired (see below for more details on artifact submission and evaluation).

Submission Process
Submissions of all types should be made in the form of an English language PDF file. Papers should use the sigconf ACM format template posted at http://www.acm.org/publications/proceedings-template/. LaTeX users should use the format used in the sample-sigconf.pdf file under the Samples folder of the zipped master file (available through the LaTeX link). Microsoft Word users can download the file Interim layout.docx under the Word Authors section of the page. Abstract and paper submissions in PDF must be received by 11:59 PM AoE (Anywhere-on-Earth time zone).

Submissions will be considered for acceptance as regular or short papers. A paper submitted to the regular or short category will only be considered in that category. Regular or short submissions will also be considered for acceptance as a poster. Once a paper has been submitted, its authorship list is considered to be fixed and final.

Important Dates
Abstracts Due: October 1, 2024 (All papers)
Submissions Due: October 8, 2024 (All papers)
Rebuttals Period: November 11 – November 18, 2024
Notification of Acceptance: November 30, 2024
Camera-Ready Submission Due: December 31, 2024
All submission deadlines are with respect to 11:59 pm Anywhere on Earth (UTC -12)

Organizing Committee
General Chair: Andrew (Putnam Microsoft)
Program Chair: Jing Li (University of Pennsylvania)