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ISLPED 2015

Abstract or Paper Registration Deadline
February 22, 2015
Final Submission Deadline
March 1, 2015

Submitted by Andreas Burg
http://www.islped.org/2015/index.html

International Symposium on Low Power Electronics and Design
July 22 – July 24, 2015
Rome, Italy
IMPORTANT DATES
Technical Paper Submission Deadline:
– Abstract registration by Feb 22, 2015
– Full paper by March 1, 2015
Invited Talk, Panel, and Embedded Tutorial Proposals Deadline: April 1, 2015
Notification of Paper Acceptance: May 1, 2015
Submission of Camera-Ready Papers: June 1, 2015

For more information or general queries, please email islped@islped.org.
Follow us on Twitter: http://twitter.com/islped

Sponsored by the IEEE Circuits and Systems Society (CASS) and the ACM Special
Interest Group on Design Automation (SIGDA).

The International Symposium on Low Power Electronics and Design (ISLPED) is
the premier forum for presentation of innovative research in all aspects of
low power electronics and design, ranging from process technologies and
analog/digital circuits, simulation and synthesis tools, system-level
design and optimization, to system software and applications. Specific
topics include, but are not limited to, the following three main tracks
and sub-areas:

1. Technology, Circuits, and Architecture

1.1. Technologies
Low-power technologies for Device, Interconnect, Logic, Memory,
2.5/3D, Cooling, Harvesting, Sensors, Optical, Printable, Biomedical,
Battery, and Alternative energy storage devices.

1.2. Circuits
Low-power digital circuits for Logic, Memory, Reliability, Clocking,
Power gating, Resiliency, Near-threshold and Sub-threshold,
Variability, and Digital assist schemes; Low-power analog/mixed-signal
circuits for Wireless, RF, MEMS, AD/DA Converters, I/O, PLLs/DLLS,
Imaging, DC-DC converters, and Analog assist schemes.

1.3. Logic and Architecture
Low-power logic and microarchitecture for SoC designs, Processor cores
(compute, graphics and other special purpose cores), Cache, Memory,
Arithmetic/Signal processing, Cryptography, Variability, Asynchronous
design, and Nonconventional computing.

2. CAD, Systems, and Software

2.1. CAD Tools and Methodologies
CAD tools and methodologies for low-power and thermal-aware design
addressing power estimation, optimization, reliability and variation impact
on power, and power-down approaches at all levels of design abstraction:
physical, circuit, gate, register transfer, behavioral, and algorithm.

2.2. Systems and Platforms
Low-power, power-aware, and thermal-aware system design and platforms
for microprocessors, DSPs, embedded systems, FPGAs, ASICs, SoCs,
heterogeneous computing, data-center power delivery and cooling, and
system-level power implications due to reliability and variability.

2.3. Software and Applications
Energy-efficient, energy-aware, and thermal-aware system software and
application design including scheduling and management, power
optimizations through HW/SW interactions, and emerging low power
applications such as approximate and brain-inspired computing, the
Internet-of-Things (IoT), wearable computing, body-area/in-body networks,
and wireless sensor networks.

3. Industrial Design Track (New Initiative for 2015)

3.1. Industry Perspectives
For the first time, ISLPED’15 solicits papers for an “Industrial Design” track
to reinforce interaction between the academic research community and
industry. Industrial Design track papers have the same submission deadline
as regular papers and should focus on similar topics, but are expected to
provide a complementary perspective to academic research by focusing on
challenges, solutions, and lessons learnt while implementing industrial-
scale designs. In addition to purely hardware-focused papers, papers
describing power optimizations through an interaction of hardware and
software are also welcome.

Submissions should be full-length papers of up to 6 pages (PDF format,
double-column, US letter size, using the IEEE Conference format, available at
http://www.ieee.org/conferences_events/conferences/publishing/templates.html),
including all illustrations, tables, references, and an abstract of no more
than 250 words. Submissions must be anonymous. Submissions exceeding 6 pages
or identifying the authors, either directly or through explicit references to
their prior work, will be automatically rejected. More information on paper
submission can be found at http://www.islped.org.

Submitted papers must describe original work that has not been
published/accepted or currently under review by another journal, conference,
symposium, or workshop at the same time. Accepted papers will be published in
the Symposium Proceedings and included in IEEE Xplore and the ACM Digital
Library. ISLPED’15 will present two Best Paper Awards based on the ratings of
reviewers and a panel of judges.

There will be several invited talks by industry and academic thought leaders
on key issues in low power electronics and design. The Symposium may also
include embedded tutorials to provide attendees with the necessary background
to follow recent research results, as well as panel discussions on future
directions in low power electronics and design.

Proposals for invited talks, embedded tutorials, and panels should be sent by
email to the ISLPED’15 Technical Program Co-Chairs, Vijay Raghunathan
(vr@purdue.edu) and Ruchir Puri (ruchir@us.ibm.com) by the deadline listed
above.

ORGANIZING COMMITTEE AND SYMPOSIUM OFFICERS:

General Co-Chairs:
Luca Benini, Univ. of Bologna, luca.benini@unibo.it
Renu Mehra, Synopsys, renu@synopsys.com
Mauro Olivieri, Sapienza Univ., olivieri@diet.uniroma1.it

Program Co-Chairs:
Ruchir Puri, IBM, ruchir@us.ibm.com
Vijay Raghunathan, Purdue Univ., vr@purdue.edu

Local Arrangement Chair:
Alessandro Trifiletti, Sapienza Univ., alessandro.trifiletti@diet.uniroma1.it

Industry Liaison:
David Garrett, Broadcom, garrettd@broadcom.com

Publicity Co-Chairs:
Andreas Burg, EPFL, andreas.burg@epfl.ch
Deming Chen, UIUC, dchen@illinois.edu

Publication Chair:
Paul Wesling, IEEE, p.wesling@ieee.org

Industrial Design Track Co-Chairs:
Edith Beigne, CEA-Leti, edith.beigne@cea.fr
Juergen Karmann, Infineon, juergen.karmann@infineon.com

Design Contest Co-Chairs:
Alberto Macii, Politecnico di Torino, alberto.macii@polito.it
Hiroki Matsutani, Keio University, matutani@arc.ics.keio.ac.jp

Treasurer:
Yu Wang, Tsinghua University, yu-wang@mail.tsinghua.edu.cn

Web Chair:
Theo Theocharides, Univ. of Cyprus, ttheocharides@ucy.ac.cy

Local Staff:
Francesco Menichelli, Sapienza Univ.
Antonio Mastrandrea, Sapienza Univ.
Zia Abbas Zaidi, Sapienza Univ.
Usman Khalid, Sapienza Univ.
Monica Coppola, FREEnergy