NOCS 2015

Submitted by Maurizio Palesi
http://nocsymposium.eecs.wsu.edu/

9th IEEE/ACM International Symposium on Networks-on-Chip
Vancouver, Canada
September 28 – 30, 2015
The International Symposium on Networks-on-Chip (NOCS) is the premier
event dedicated to interdisciplinary research on on-chip, chip-scale,
and multichip package scale communication technology, architecture,
design methods, applications and systems. NOCS brings together
scientists and engineers working on NoC innovations and applications
from inter-related research communities, including computer
architecture, networking, circuits and systems, packaging, embedded
systems, and design automation.

Topics of interest include, but are not limited to:

NoC Architecture and Implementation
– Network architecture (topology, routing, arbitration)
– NoC Quality of Service
– Timing, synchronous/asynchronous communication
– NoC reliability issues
– Network interface issues
– NoC design methodologies and tools
– Signaling & circuit design for NoC links
NoC Analysis and Verification
– Power, energy & thermal issues(at the NoC, un-core and/or system-level)
– Benchmarking & experience with NoC-based hardware
– Modeling, simulation, and synthesis of NoCs
– Verification, debug & test of NoCs
– Metrics and benchmarks for NoCs
Novel NoC Technologies
– New physical interconnect technologies, e.g., carbon nanotubes,
wireless NoCs, through-silicon, etc.
– Optical, RF, & emerging technologies for on-chip/in-package
interconnects
– NoCs for 3D and 2.5D packages
– Package-specific NoC design
NoC Application
– Mapping of applications onto NoCs
– NoC case studies, application-specific NoC design
– NoCs for FPGAs, structured ASICs, CMPs and MPSoCs
– NoC designs for heterogeneous systems, fused CPU-GPU
architectures, etc
– Scalable modeling of NoCs
NoC at the Un-Core and System-level
– Design of memory subsystem (un-core) including memory
controllers, caches, cache coherence protocols & NoCs
– NoC support for memory and cache access
– OS support for NoCs
– Programming models including shared memory, message passing
and novel programming models
– Issues related to large-scale systems (datacenters, supercomputers)
with NoC-based systems as building blocks
– On-Chip Communication Optimization
– Communication efficient algorithms
– Multi/many-core communication workload characterization & evaluation
– Energy efficient NoCs and energy minimization

Electronic paper submission requires a full paper, up to 8
double-column IEEE format pages, including figures and references. The
program committee in a double-blind review process will evaluate
papers based on scientific merit, innovation, relevance, and
presentation.Submitted papers must describe original work that has
not been published before or is under review by another conference or
journal at the same time. Each submission will be checked for any
significant similarity to previously published works or for
simultaneous submission to other archival venues, and such papers
will be rejected. Please see the paper submission instructions for
details.This year will also include one or more industrial sessions on
the architecture of future NoC platforms. The objective of these
sessions is to provide a forum for industry leaders to share their
experiences and perspectives on the technical challenges facing future
platforms and discuss potential solutions. Check the submission page
for details on submissions to this session. These sessions will
feature a small number of papers (4-6) covering experiences from
industrial design and development.

Proposals for tutorials, special sessions, and panels are also
invited. Please see the detailed submission instructions for paper,
tutorial, special sessions, and panel proposals at the submission
page.

IMPORTANT DATES
– Abstract registration deadline February, 27th, 2015
– Full paper submission deadline March 6th, 2015
– Notification of acceptance May 5th, 2015
– Final version due June 1st, 2015
– Industry Session submission deadline March 23rd 2015

CONTACT INFORMATION
General Co-Chairs
– Andre Ivanov, University of British Columbia
– Diana Marculescu, Carnegie Mellon University
Program Co-Chairs
– Partha Pratim Pande, Washington State University
– José Flich, Universitat Politècnica de València