Transact 2015

Submitted by Victor Luchangco
http://transact2015.cse.lehigh.edu/

10th ACM SIGPLAN Workshop on Transactional Computing (Transact 2015)
Portland, Oregon, USA
15-16 June 2015
This year, Transact will be part of the Federated Computing Research
Conference (FCRC).
General FCRC information is available at http://fcrc.acm.org.
Also note Transact will two days this year rather than just one.

IMPORTANT DATES
Submission Deadline: 19 February 2015 (Thursday)
Author Notification: 24 April 2015 (Friday)
Workshop: 15-16 June 2015 (Monday-Tuesday)

OVERVIEW
The past decade has seen an explosion of interest in programming languages,
systems, and hardware to support transactions, speculation, and related
alternatives to classical lock-based concurrency. Recently, transactional
memory has crossed two new thresholds. First, IBM and Intel are now shipping
processors with hardware support for transactional memory. Second, the C++
Standard Committee has begun investigation into transactional memory as a
new language feature. These developments highlight the demand for continued
high quality TM research.

Transact 2015 will provide a forum to present and discuss the latest research
on all aspects of transactional computing. The tenth in the series, it will
extend over two days (rather than the usual one) during the Federated
Computing Research Conference (FCRC). The scope of the workshop is
intentionally broad, with the goal of encouraging interaction across the
languages, architecture, systems, database, and theory communities. Papers
may address implementation techniques, foundational results, applications and
workloads, or experience with working systems. Environments of interest
include the full range from multithreaded or multicore processors to high-end
parallel computing.

TOPICS
Transact seeks papers on topics related to all areas of software and hardware
for transactional computing. Specific topics of interest include but are not
limited to:

– Run-time systems
– Hardware support
– Applications, workloads, and test suites
– Experience reports
– Language mechanisms and semantics
– Memory models
– Formal verification
– Speculative concurrency
– Conflict detection and contention management
– Debugging and tools
– Static analysis and compiler optimizations
– Checkpointing and failure atomicity
– Persistence and I/O
– Nesting and exceptions

Papers should present original research. As transactional memory spans many
disciplines, papers should provide sufficient background material to make them
accessible to the broader community. Papers focused on foundations should
indicate how the work can be used to advance practice; papers on experiences
and applications should indicate how the experiments reinforce or reflect principles.

SUBMISSIONS
Papers must be submitted in PDF, and be no more than 8 pages in standard
two-column SIGPLAN conference format including figures and tables but not
including references. Shorter submissions are welcome. Submissions will be
judged based on the merit of the ideas rather than the length. Submissions
must be made through the on-line submission site. Final papers will be
available to participants electronically at the meeting, but to facilitate
resubmission to more formal venues, no archival proceedings will be published,
and papers will not be sent to the ACM Digital Library.

Authors will have the option of having their final paper accessible from the
workshop website. Authors must be familiar with and abide by SIGPLAN’s
republication policy, which forbids simultaneous submission to multiple venues
and requires disclosing prior publication of closely related work. At the
discretion of the program committee and with the consent of the authors,
particularly worthy papers may be recommended for a special journal issue.

PROGRAM COMMITTEE
Cristiana Amza, University of Toronto
Annette Bieniusa, Universitat Kaiserslautern
Luke Dalessandro, Indiana University
Dave Dice, Oracle Labs
Stephan Diestelhorst, ARM
Pascal Felber, Universite de Neuchatel
Justin Gottschlich, Intel Labs
Victor Luchangco, Oracle Labs (chair)
Alessia Milani, Bordeaux Institute of Technology
Binoy Ravindran, Virginia Tech
Torvald Riegel, Red Hat
Paolo Romano, University of Lisbon
Michael Scott, University of Rochester
Michael Spear, Lehigh University
Osman Unsal, BSC-Microsoft Research Centre

ORGANIZING COMMITTEE
General Chair:
Justin Gottschlich, Intel Labs

Program Chair:
Victor Luchangco, Oracle Labs

Web Chair:
Michael Spear, Lehigh University

Steering Committee:
Pascal Felber, University de Neuchatel
Justin Gottschlich, Intel Labs
Dan Grossman, University of Washington
Rachid Guerraoui, EPFL
Tim Harris, Oracle Labs
Maurice Herlihy, Brown University
Eliot Moss, UMass
Jan Vitek, Purdue University
Michael Scott, University of Rochester
Tatiana Shpeisman, Intel Labs
Michael Spear, Lehigh University