Workshop on Reconfigurable Computing

Submitted by Kubilay Atasu
http://paginas.fe.up.pt/~specs/events/wrc2016/

10th HiPEAC Workshop on Reconfigurable Computing (WRC’2016)
Prague, Czech Republic
January 19, 2016
The HiPEAC Workshop on Reconfigurable Computing (WRC) provides a forum for
researchers active in domains within the reconfigurable computing area. Its
main focus is on reconfigurable architectures, tools and algorithms that
facilitate reconfigurable systems and applications tailored for reconfigurable
platforms. The WRC’2016 forum intends to provide a substantially different
event from the well-known conferences and workshops related to reconfigurable
computing, by focusing on an informal way to discuss challenges, new ideas,
future trends, and work in progress. For the second time, the Hot Topic of WRC
is High Performance Reconfigurable Computing. We encourage submissions in the
following areas:

– High Performance Reconfigurable Computing: languages and compilation, tools
and design flows, adaptability, virtualization, reliability, and
communication.

– Reconfigurable Architectures: novel reconfigurable fabrics, memory design,
low power design, adaptive architectures, networks on chip, fault tolerance.

– Reconfigurable Tools and Technologies: system-level design, HW/SW co-design,
partitioning, mapping, modeling, cost and power optimization, dynamic
reconfiguration, verification, testing, benchmarking.

– Reconfigurable Applications and Algorithms: scientific computing, adaptive
computing, bio-inspired computing, domain-specific computing, multimedia,
bioinformatics, signal processing, rapid prototyping, low-latency.

– Big Data Architectures: Scalable reconfigurable architectures for graph,
text, and multimedia data mining, machine learning, and deep neural networks.

– System Security: cryptographic hardware architectures, security processors,
countermeasures against side-channel attacks, and secure cloud computing.

Selected papers will be invited for publication in a special issue of the
Springer’s Journal of Signal Processing Systems (JSPS), dedicated to WRC’2016.

QUICK LINKS
– Workshop: http://www.fe.up.pt/wrc2016
– Submissions: https://easychair.org/conferences/?conf=wrc2016
– HiPEAC 2016: https://www.hipeac.net/2016/prague/

SUBMISSION GUIDELINES
WRC’2016 will accept 8-page full papers and 4-page short papers. Submissions to
WRC’2016 must use the double-column IEEE conference proceedings format. An
online submission page will be available on the WRC’2016 website, which will
include detailed submission guidelines and formatting templates.

IMPORTANT DATES
– Submission Deadline: November 13, 2015
– Notification E-mails: December 18, 2015
– Camera-Ready Version: January, 8, 2016

ORGANIZERS
General Co-Chairs
Juergen Becker, KIT, Germany
João M. P. Cardoso, University of Porto, Portugal

Program Co-Chairs
Kubilay Atasu, IBM Research – Zurich, Switzerland
Steven Derrien, IRISA/INRIA, University of Rennes 1, France

Web Chair
João Bispo, University of Porto, Portugal