Workshop on Sustainability in Multi/Many-Core Systems

Workshop on Sustainability in Multi/Many-Core Systems (SiMS)
in conjunction with International Green and Sustainable Computing Conference
Orlando, Florida, USA
October 23, 2017

IMPORTANT DATES:
Submission Due: September 8, 2017
Notification of Acceptance: September 15, 2017
Camera-ready paper due: September 22, 2017

As part of the IEEE International Green and Sustainable Computing conference, SiMS workshop will be organized to address energy-efficient design and application of multi/many-core systems. The emergence of modern high-performance computing (HPC) systems with hundreds of multicore chips is driven by increasingly large applications with varying computation during runtime. Increasing core count from multi-core to many-core systems and scaling down the chip size result in a dramatic increase in system energy consumption which, in turn, increases cooling costs and decreases reliability of system components. According to the National Resources Defense Council, the HPC centers will consume up to 140 billion kilowatt-hours annually by 2020, which costs American businesses $13 billion in electricity bills each year. It is expected that energy saving measures save 39 billion kilo-watt hours, which is equivalent to $3.8 billion per year.

Reducing the energy consumption is often in conflict with improving application execution time. This trade-off can be addressed either by system-level or application-level technique in multi/many-core energy efficient systems. System-level solutions may range from fine-grain dynamic voltage and frequency (V/F) level adjustments for each core to coarse-grain V/F level adjustments for groups/clusters of cores, referred to as voltage-frequency islands (VFI). Choosing either design provides solutions that trade off hardware complexity to perform per-core dynamic voltage-frequency scaling (DVFS) and adapting to varying application workload during runtime that impacts energy efficiency. The application-level techniques scale the cores’ V/F levels by analyzing macro-level application characteristic i.e. task set and scheduling them among the cores while preserving task precedence relations. Task scheduling/assignment, combined with either per-core DVFS or VFI-based system, aims to optimize user-defined objectives, e.g. minimizing system energy consumption, temperature, and overall application execution time.

This workshop aims to encourage researchers to present their state-of-the-art works, position papers in a broad domain of topics about system- and application-level techniques applied on core- or VFI-level to optimize multi/many-core systems energy efficiency. This by-invitation workshop encompasses the following topics:

– Static/Dynamic resource allocation in multi/many-core systems
– Energy-efficient scheduling and resource allocation in multi/many-core systems
– Hardware and software co-design for energy- efficient multi/many-core systems
– Energy-efficient homogenous/heterogeneous multi/many-core systems
– Energy-efficient interconnection architectures in multi/many-core systems
– Power/Energy efficiency of core/VFI-level multi/many-core systems
– Power and thermal control of multi/many-core systems
– Sustainable multi/many-core architectures for VFI-based systems
– Energy/Temperature vs. scalability trade-off in many-core systems
– Learning optimization techniques for energy efficiency of multi/many-core systems

ORGANIZERS:
Behrooz Shirazi, Washington State University
Shervin Hajiamini, Washington State University