PACT 2017

26th International Conference on Parallel Architectures and Compilation Techniques (PACT 2017)
Portland, USA
Sept 9-13, 2017

Early Registration Deadline: August 14, 2017

The purpose of PACT 2017 is to bring together researchers from architecture, compilers, applications and languages to present and discuss innovative research of common interest. We invite attendees to register for our exciting program this year consisting of many informative workshops/tutorials, leading industry keynotes and conference papers and posters.

PRELIMINARY PROGRAM:

Workshops and Tutorials:

Saturday, Sep 9:
– AVX-512: AVX-512 Architecture Insights, Compiler Optimizations and Code Modernization
– AMD’s Radeon Open Compute and Heterogeneous System Architecture, an open standard foundation for deep learning and highly scalable compute
– ANDARE: Workshop on Autotuning and Adaptivity Approaches for Energy Efficient HPC
– Parallelism in Computer Arithmetic: From Circuits to GPU-Based Supercomputers
– rCUDA: Boosting the performance of hybrid CPU-GPU clusters with rCUDA
– Min-Move 2017: Hardware/Software Techniques for Minimizing Data Movement

Sunday, Sept 10:
– CISC 2017: Computational Intelligence & Soft Computing
– AIM: Workshop on Architectures for Intelligent Machines
– HARP: Intel Hardware Accelerator Research Program – A Tutorial for learning and using the Intel Xeon with integrated FPGA
– OmpSs: Heterogeneous Parallel Programming with OmpSs
– DFM 2017: Data Flow Models for Extreme-Scale Computing

Main Conference:

Keynotes:
– Marc Tremblay, Microsoft: “Cloud Performance – AI and Others”
– P. Sadayappan, Ohio State University: “Can compilers help us achieve high performance, productivity, and portability?”
– Pradeep Dubey, Intel: “AI and The Virtuous Cycle of Compute”

Conference program:
Online at https://parasol.tamu.edu/pact17/main-conference

ORGANIZERS:
General Chair: Ravi Iyer (Intel)
Program Chair: David Padua (UIUC)