I'm a Ph.D. student at UT Austin working with Dr. Calvin Lin. Broadly, I'm interested in microarchitectural prediction for memory systems performance and in rethinking the hardware/software interface in light of modern performance, programmability, and security challenges. I'm also interested in computer architecture education. Before coming to UT, I was a CS and EE lecturer at Texas State University, and early in my career I was a hardware verification engineer at Arm.

I'm a Ph.D. candidate at Department of Computer Science and Engineering, Indian Institute of Technology, Madras, advised by Prof. Chester Rebeiro. My research interests are broadly in the area of secure systems design, with a specific focus on micro-architecture level solutions against various attacks against cryptographic implementations, such as cache side-channel attacks. I'm also interested in exploring the applications of AI to help in building a more secure framework. I was one among the 12 candidates across the world to present my research at Lenovo AI Innovation Challenge Event at SuperComputing Conference 2017, Denver, Colorado. I was also one of the three-member team from IIT Madras that won the First Place in the CSAW Embedded Security Challenge 2016. We designed a secure implementation of an OpenRISC processor to detect and prevent buffer overflow attacks.

Peh Li Shiuan joins NUS as Provost’s Chair Professor in the Department of Computer Science, with a courtesy appointment in the Department of Electrical and Computer Engineering in September 2016. Previously, she was Professor of Electrical Engineering and Computer Science at MIT and was on the faculty of MIT since 2009. She was also the Associate Director for Outreach of the Singapore-MIT Alliance of Research & Technology (SMART). Prior to MIT, she was on the faculty of Princeton University from 2002. She graduated with a Ph.D. in Computer Science from Stanford University in 2001, and a B.S. in Computer Science from the National University of Singapore in 1995. Her research focuses on networked computing, in many-core chips as well as mobile wireless systems. She was awarded the IEEE Fellow in 2017, NRF Returning Singaporean Scientist Award in 2016, ACM Distinguished Scientist Award in 2011, MICRO Hall of Fame in 2011, CRA Anita Borg Early Career Award in 2007, Sloan Research Fellowship in 2006, and the NSF CAREER award in 2003.

Natalie Enright Jerger is the Canada Research Chair in Computer Architecture and a Professor of Electrical and Computer Engineering at the University of Toronto. She is currently serving as the Director of the Division of Engineering Scinece at the University of Toronto. Prior to joining the University of Toronto, she received her MSEE and PhD from the University of Wisconsin-Madison in 2004 and 2008, respectively. She received her Bachelor's degree from Purdue University in 2002. She is a recipient of the Ontario Ministry of Research and Innovation Early Researcher Award in 2012, the 2014 Ontario Professional Engineers Young Engineer Medal recipient and the 2015 Borg Early Career Award winner. She served as the program co-chair of the 7th Network-on-Chip Symposium, as the program chair of the 20th International Symposium on High Performance Computer Architecture and as program co-chair for the International Conference on Architectural Support for Programming Languages and Operating Systems in 2023. She is currently serving as the ACM SIGARCH Chair. Her current research explores on-chip networks, approximate computing, IoT architectures and machine learning acceleration. She is also passionate about increasing the representation of women in computing, particular in computer architecture. She is the former chair of the organizing committee for the Women in Computer Architecture group (WICARCH). In 2017, she co-authored the second edition of the Computer Architecture Synthesis Lecture on On-Chip Networks with Li-Shiuan Peh and Tushar Krishna. Her research has been supported by NSERC, Intel, CFI, AMD and Qualcomm.