by Keshav Pingali on Jul 26, 2018 | Tags: data-centric computing, functional languages, imperative languages, Parallelism
The term “von Neumann bottleneck” was coined by John Backus in his 1978 Turing Award lecture to refer to the bus connecting the CPU to the store in von Neumann architectures. In this lecture, he argued that the bus was a bottleneck because programs execute on the CPU...
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by Steve Swanson on Jul 19, 2018 | Tags: Memory, non-volatile, Persistent
Mainstream non-volatile main memory (NVMM) is just around the corner: Intel is opening up access to their 3DXpoint technology to a broader range of companies, and we are gradually learning more about the technology. Despite our growing understanding, the question of...
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by Martha Kim on Jul 16, 2018 | Tags: Benchmarks
Today streaming video accounts for over 70% of evening web traffic in the US. YouTube upload rates outpace not only CPU performance, but Moore’s Law itself, and reached 400 hours of video per minute in July 2015. In addition to sheer hours per minute, the videos...
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by Yuan Xie on Jul 12, 2018 | Tags: Accelerators, Emerging Technology, Machine Learning, Memory, Near Data Computing, Specialization
A previous blog titled “Blurring the lines between memory and compute” by R. Das was a nice summary of the history and the recent trends on addressing the memory wall challenges with process-in-memory (PIM) ideas. This blog would like to further highlight...
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by Daniel A. Jiménez, interim Chair of IEEE TCCA on Jul 9, 2018 | Tags: Conference
Peer-reviewed articles in top conferences are both the result and the driving force of computer architecture research. As our community expands and the number of submissions to top conferences continues to grow, it will be imperative to improve the review process....
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