by Biswabandan Panda on Dec 11, 2024 | Tags: caches, Security
This blog post is a continuation of Gururaj’s SIGARCH blog, written three years ago. It revisits the design of secure caches and, primarily, two design choices available to the designers: partitioned cache and randomized cache. In the last three years,...
Read more...
by Minesh Patel on Nov 22, 2024 | Tags: Conferences
Research-hungry, knowledge-thirsty citizens of Planet Earth swarmed Austin this November for a Texas-sized MICRO that sold out, surpassing all expectations. Hallways were packed and lines were long as General Chairs Paul Gratz, Jose Joao, and Jason Clemons showed us...
Read more...
by ASPLOS Steering Committee on Oct 29, 2024 | Tags: Conferences, Survey
TL;DR The ASPLOS Steering Committee (SC) is soliciting feedback on the new review process introduced with ASPLOS 2023. The SC welcomes input on the impact of the new process and changes being contemplated for ASPLOS 2026. Please read this whole post then complete this...
Read more...
by Karu Sankaralingam on Oct 22, 2024 | Tags: Reviewing
I had an exhausting and painful experience this year with reviews for recent top-tier SIGARCH conferences – the usual ISCA, ASPLOS, HPCA, MICRO. No I am not complaining about the reviewer load. It’s reading others’ reviews of papers I was reviewing –...
Read more...
by Bryan Chin, Jishen Zhao, Haoxing (Mark) Ren, Stelios Diamantidis, Hans Bouwmeester, Hanxian Huang on Oct 16, 2024 | Tags: AI Agents, Chip Design, Large Language Models
New hardware capabilities have enabled transformational AI technologies in many industries and applications. One of those industries is hardware design itself, the very discipline that enabled increased AI capabilities in the first place. At Hotchips 2024, we held a...
Read more...
by Jay Shah on Oct 8, 2024 | Tags: Accelerators, Machine Learning, Programming
General Matrix Multiplication (GEMM) is a fundamental operation in machine learning and scientific computing. It is the classic example of an algorithm that benefits greatly from GPU acceleration due to its high degree of data parallelism. More recently, efficient...
Read more...
by Daniel Moghimi on Sep 26, 2024 | Tags: Security
The discovery of Meltdown and Spectre, along with their extensive media coverage, brought hardware security research to the spotlight. A wake-up call for major chipset manufacturers such as Intel, AMD, and ARM, we learnt that hardware vulnerabilities can be exploited...
Read more...
by Dimitris Gizopoulos on Sep 16, 2024 | Tags: fault tolerance, Reliability, silent data corruptions
Data center hyperscalers (Meta, Google, Alibaba) have disclosed over the last four years an unexpectedly high number of CPUs (~1 in 1000) that produce Silent Data Corruptions (SDCs), i.e. program executions that produce wrong results without any observable indication....
Read more...
by Ghadeer Almusaddar and Yicheng Zhang on Sep 9, 2024 | Tags: Conferences, Security
33rd USENIX Security Symposium was held in Philadelphia in August 2024. Following recent trends, the symposium featured several sessions dedicated to hardware and microarchitectural security. The program includes papers targeting side-channels and covert channels...
Read more...
by Yuhao Zhu, Shuang Wu, Bo Yu, Shaoshan Liu on Sep 3, 2024 | Tags: autonomy, economies of scale
A version of this blog post will appear as an opinion article in CACM. Continued progress in the burgeoning field of robotics and autonomous machines depends critically on an efficient computing substrate. For very good reasons, the systems and architecture have...
Read more...