I. Embodied Carbon
Recently, embodied carbon, defined as the Scope 3 GHG emissions that arise from the manufacturing processes that lead to computing electronics, has become popular as an architectural metric for sustainability. If you are considering it or using it, as a technology metric for computer architecture designs, it’s critical to understand its limitations as a technology metric. Embodied carbon has several problems:
Figure 1. Embodied Carbon Ratios for microprocessors and H2 gas.
-
- Embodied carbon is highly sensitive to vendor selection. For example, Intel recently announced that its Sapphire Rapids server processor is manufactured with over 90% renewable energy [Intel23a,Intel23b]. According to recent disclosures, processors or GPUs from other silicon manufacturers are estimated at 12% renewable energy [TSMC22]. Simple arithmetic suggests (88%/10%) at least an 8-fold difference in embodied carbon based on vendor selection. See Figure 1. The difference for microprocessors is due to major efforts of the US semiconductor manufacturing industry to “clean” itself up since the 1970’s, regional differences in power grid structure, and varied corporate priorities in decarbonizing their power supply.
A simplistic view of this situation would be that to achieve equal embodied carbon, designs at vendor A would need to be 1/8th the size, to achieve the same embodied carbon. This is a tough conversation to have at a fabless design semi firm (eg Apple, NVIDIA, AMD,…), where design optimization typically already means “deliver the maximum capability” for a given silicon area. Of course, there are other elements of embodied carbon beyond electric power carbon content, but a number of studies suggest its the major element, and more interesting, manufacturing process experts have suggested that many of the other GHGs emitted can be destroyed with clean combustion processes [IMEC21].
Is it surprising that there would be such a large difference? From a sustainability point of view, not really. Consider the situation with hydrogen gas (H2) and differences in embodied carbon due to manufacturing process. “Brown” hydrogen gas, that most widely available, has 21 kgCO2/kgH2 because it is generally made with natural gas. In contrast “Green” hydrogen, manufactured using hydrolyzers and renewable power, can have embodied carbon as low as 1.17 kgCO2/kgH2 [Gupta22]. This difference is 18-fold, for the simplest of chemicals.
So, we should expect large, persistent differences in embodied carbon, based on vendor, process, and supply chain. If these differences are large (10x), it makes use of embodied carbon as an architectural metric difficult.
2. Embodied carbon numbers are disproportionately large. The purpose of Scope 3 GHG is exactly to assure broader accountability, including both upstream (manufacturing) and downstream (use), so Scope 3 carbon is typically the major share (75% vs 25%) compared to Scope 1 and 2. This economic approach is similar to that for toxic chemicals, child labor, etc. to align economic forces to reduce carbon emissions (and prevent “outsourcing”). These forces work in two ways.
First, economic pressure by “customers” on their “suppliers” to reduce their embodied carbon (eg. apple, others). These forces are similar to recent campaigns to reduce mercury content, forced labor conditions, and even prison labor in Xinjiang. Such an approach will indeed make progress over time, and examples of this are supplier decarbonization goals by 2030 [Apple22].
The second approach is for customers to require/pay their suppliers to decarbonize. Because supply chains typically feed a chain of increasing value, the profits downstream are often much larger. Should the customers of TSMC, simply pay for rapid decarbonization of TSMC? By our estimates it would require less than 1% of their single-year profits, and any of them could easily foot the entire bill. They just need an economic incentive to pay for it! (the SEC’s nascent climate risk reporting requirements for Scope 3 GHG – includes embodied carbon – could be such an incentive. Consider lobbying FOR these reporting requirements!) And yes, it’s true that many of TSMC’s customers are lobbying against these reporting requirements. To eliminate the carbon footprint for its estimated 2.3 GW sustained power use, we use an estimate of $1.4B.
| Company (2022 TSMC Revenue Share) | Recent Fiscal Year Profits | Estimated Profit Fraction to – Eliminate their Share of TSMC’s Carbon Footprint in 1 year | Profit Fraction to eliminate 100% of TSMC’s Carbon Footprint in 5 years
|
| Apple (30%) | $99.8B (2022) | 0.5% | (1.4%/5) = 0.28% |
| Nvidia (2.8%) | $4.4B (2023) | 0.9% | (32%/5) = 6.4% |
| AMD (4.9%) | $3.0B (2021) | 2% | (46%/5) = 9.2% |
| Qualcomm (3.9%) | $12.9B (2022) | 0.4% | (11%/5) = 2.2% |
The table omits other significant customers such as MediaTek, Broadcom, and Sony. But the point is that if motivated, TSMC’s customers could finance the decarbonization of TSMC’s power supply in a short period of time, eliminating the associated embodied carbon footprint.
3. Researchers have pointed out problems with Embodied carbon as a metric, involving double, triple, quadruple, etc. counting [Bash23]. While these flaws don’t make embodied carbon directionally incorrect (reducing it still is good!), they make methods that use sums of embodied carbon and operational carbon as a metric problematic because they overweight embodied carbon; most companies with complex supply chains will be 75-90% embodied carbon. So, you should read any claims that read “embodied carbon is the most of carbon footprint” with caution.
II. Operational Carbon
Computing’s operational carbon is still an important problem and will remain so for decades. Large-scale computing and edge facilities (eg data centers) continue to consume growing numbers of TerawattHours of power, much of it generated by fossil fuels. There are three important things to understand:
-
- Despite pronouncements about “carbon-neutral”, “24×7”, and “zero carbon”, the reality is that none of these offsetting measures eliminate the carbon-impact of computing’s power consumption. When datacenters consume power from a grid with mixed generation (eg. fossil fuels), they bear responsibility for those carbon emissions.
- Datacenter load is growing rapidly, by perhaps as much as 25% per year [Chien23], and is at grid-reliability threatening levels (20%, 14% of total grid power) in a growing number of power grids. One should expect this phenomena in a growing number of grids over the next several years [DomVPE23]. (see Figure 2)
Figure 2. The rapid growth of Datacenters in Northern Virginia has required utilities to increase their future power needs estimates. For Dominion Energy the 2030 estimate has increase by 12GW in the short period from 2019 to 2023.
- Grid decarbonization is slow. The US power grid is expected to be 44% renewables, 56% carbon-free by 2050 with full decarbonization well beyond 2070. [EIA22] The situation in the EU is better with a binding goal of 42.5% renewables by 2030 [EC22]
- Datacenter load retards grid decarbonization as it generally does not respond to the availability of renewables, an increasing problem as grids strive for higher and higher levels of renewable generation [LC21]. The problem is nearly constant loads which fail to align the variation in renewable generation; the key to cost-effective grid decarbonization. While promising, battery energy storage remains too expensive for large-scale supply balancing over hours, days, or weeks. The energy storage being deployed in many grids is used primarily for short-term purposes such as increased ramp rates.
How to reduce the operational carbon of computing? The key is to align computing load with the availability of renewables. This means load shifting in time and space. And this demands new innovation in computer architecture – in chips, systems, and at datacenter scale.
The architectural challenge is to deliver a fixed quantity of compute – at a variable rate over time, allowing it to align with renewable generation – all at the same (or similar TCO). Its difficult to deliver large compute dynamic range with low capex cost, but our increasing dark silicon challenge means that we can achieve it with solutions that increase headroom in power/heat budgets. And, by operating at higher levels of PUE! [Chien22]
About the author: Andrew A. Chien is the William Eckhardt Distinguished Service Professor at the University of Chicago. His research interests include parallel computer architecture, cloud software, datacenters, programming systems. He is the leader of the Zero-Carbon Cloud project, and a leader for computing sustainability. From 2017-22, Dr. Chien served as Editor in Chief for Communications of the ACM, and from 2005-2010 as Vice President of Research at Intel. He has held Professorships at UCSD and Illinois (UIUC), and is a Fellow of the ACM, IEEE, and AAAS. Dr. Chien received his BS, MS, and PhD from the Massachusetts Institute of Technology.
Disclaimer: These posts are written by individual contributors to share their thoughts on the Computer Architecture Today blog for the benefit of the community. Any views or opinions represented in this blog are personal, belong solely to the blog author and do not represent those of ACM SIGARCH or its parent organization, ACM.
