Archive of posts tagged: Accelerators
From Application Specific to General Purpose (Again)
With Dennard scaling discontinued, application-specific hardware accelerators are ubiquitous in modern computers to offer more efficient task processing. Famous examples include Google’s Tensor Processing Units (TPUs) and Apple’s Neural Engines for...
Algorithm Evolution and Hardware Acceleration of Graph Mining
Graphs have long been treated as a challenging data type in the system and architecture community, due to excessive random accesses from the irregular graph structures and significant load imbalance from the power-law degree distribution. Beyond traditional graph...
Uncertainty in Computation and Computer Architectures, Part 2
In Part 1 of this two-part post, I looked at some of the existing and possible avenues for computer architecture research relating to tracking uncertainty in computations, using the blackscholes benchmark from the PARSEC suite of computer architecture research benchmark applications as a working example. In this post, I’ll outline some existing and possible future paths for computer architects in computation with uncertainty. Just as architectural support and microarchitectural implementations of floating-point number representations improved the ease of implementation of real-valued computations, architectural and microarchitectural support for representations of uncertainty could enable new approaches to trustworthy computation on empirical data.
The Time is Ripe for Disaggregated Systems
Despite being hidden from the end user, datacenters are ubiquitous in today’s life. Massive datacenter installations are the driving force behind social networking, search, streaming services, e-commerce, cloud, and the gig economy. Today’s datacenters are as...Subscribe
