![The Time is Ripe for Disaggregated Systems](https://www.sigarch.org/wp-content/uploads/2021/09/AdobeStock_221603601-300x175.jpeg)
Archive of posts tagged: Memory
![The Time is Ripe for Disaggregated Systems](https://www.sigarch.org/wp-content/uploads/2021/09/AdobeStock_221603601-300x175.jpeg)
![Memory-centric Computing Systems: What’s Old Is New Again](https://www.sigarch.org/wp-content/uploads/2021/09/AdobeStock_451327421-300x175.jpeg)
Memory-centric Computing Systems: What’s Old Is New Again
The Memory (Bandwidth and Capacity) Wall The “memory wall” problem, originally coined by Wulf and McKee in the 1990s, pointed out that the rate of improvement in microprocessor performance far exceeds the rate of improvement in DRAM memory speed. Such trend rendered...![Different Approaches to 3D DRAM and Implications for Architecture Researchers](https://www.sigarch.org/wp-content/uploads/2021/04/AdobeStock_272279798-300x175.jpeg)
Different Approaches to 3D DRAM and Implications for Architecture Researchers
Seemingly insatiable application demands for memory bandwidth, coupled with the energy needed to sustain high off-chip bandwidth, are putting increasing demands on main memory systems. In the quest for solutions that provide higher performance and better energy...![The Case for a Programmable Memory Hierarchy](https://www.sigarch.org/wp-content/uploads/2021/04/AdobeStock_161998133-300x175.jpeg)
The Case for a Programmable Memory Hierarchy
Once upon a time, cores and memory ran at similar speeds, and programs could read and write memory directly without complications. The load-store interface was born as a simple way to give programs access to data, and, at this stage in computing history, this...![Data Analytics on GPUs with Fast, Coherent Interconnects](https://www.sigarch.org/wp-content/uploads/2020/09/AdobeStock_205157110-300x175.jpeg)