![From Hardware Description Languages to Accelerator Design Languages](https://www.sigarch.org/wp-content/uploads/2021/06/AdobeStock_429657870-300x175.jpeg)
Archive of posts tagged: Programmability
![From Hardware Description Languages to Accelerator Design Languages](https://www.sigarch.org/wp-content/uploads/2021/06/AdobeStock_429657870-300x175.jpeg)
![The Case for a Programmable Memory Hierarchy](https://www.sigarch.org/wp-content/uploads/2021/04/AdobeStock_161998133-300x175.jpeg)
The Case for a Programmable Memory Hierarchy
Once upon a time, cores and memory ran at similar speeds, and programs could read and write memory directly without complications. The load-store interface was born as a simple way to give programs access to data, and, at this stage in computing history, this...![Languages, Tools, and Techniques for Accelerator Design](https://www.sigarch.org/wp-content/uploads/2021/02/AdobeStock_182255939-300x175.jpeg)
Languages, Tools, and Techniques for Accelerator Design
FPGA-based accelerators have opened up a new frontier for accelerator design; instead of spending months building and fabricating silicon chips, programmers can buy a cloud instance to run custom hardware accelerators within hours. With the remarkable new hardware, there is a need for remarkable new software.
![From Heavy Metal to Irrational Exuberance](https://www.sigarch.org/wp-content/uploads/2020/10/slow-to-fast-homer-300x175.jpg)
From Heavy Metal to Irrational Exuberance
The focus of most published research in architecture is on applications implemented in high-performance, “close-to-the-metal” languages essentially developed before computers got fast. These, let’s call them metal languages, include FORTRAN...![Highlights From Persistent Programming In Real Life (PIRL) 2019](https://www.sigarch.org/wp-content/uploads/2019/08/DSC_3673-cropped-e1565111961197-300x175.jpg)